SimpleVOut - FPGA Core for Creating VGA/DVI/HDMI/OpenLDI Signa | ★𝗜𝗣𝕔𝕠𝕣𝕖𝕤★
SimpleVOut - FPGA Core for Creating VGA/DVI/HDMI/OpenLDI Signals
SimpleVOut (SVO) is a simple set of FPGA cores for creating video signals in various formats. The cores connect using AXI-streams. Most configurations (resolution, framerate, colordepth, etc.) are set at compile-time using Verilog parameters. See svo_defines.vh for details on those parameters.
Collection of IP-cores for FPGA & ASIC written on Verilog/VHDL. #FPGA #ASIC #VHDL #verilog #IP #Xilinx #Altera. PS: also might be intresting @fpgasic...
