svinst - tool takes a SystemVerilog file as input and produces | 𝐅𝐏𝐆𝔸𝐒𝐈𝐂

svinst - tool takes a SystemVerilog file as input and produces as output the module(s) declared in that file, along with the module(s) instantiated in each one of those module declarations (written in Rust).

https://github.com/sgherbst/svinst

#parser #parsing #instantiation #sv #systemverilog #rust
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