XiangShan - mature (almost 6000 commits) high-performance RISC-V processor by Institute of Computing Technology, Chinese Academy of Sciences. https://github.com/OpenXiangShan/XiangShan https://github.com/OpenXiangShan/XiangShan-doc #ISA #RISCV #scala #chisel #CPU #FPU @ipcores 309 views𝔻𝕠𝕜𝕒, 16:20
