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FPG/A/SIC tips and tricks
#FPGA #ASIC #VHDL #verilog #IP #Xilinx #Altera
PS: also might be intresting @ipcores
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The latest Messages 4
2020-10-23 15:24:37
Verilog Template for VS Code Remote Development
Verilog template which is easy to develop, using VS Code Remote Development. It uses Icarus Verilog, GTKWave, and Docker.
https://github.com/ha2zakura/verilog-template
#VScode #MS #verilog #SV #docker #icarus #gtkwave
@fpgasic
1.8K views12:24
2020-10-16 17:40:50
BTW, you can find a huge collection of RTL sources on this channel.
Feel free to join and share!
t.me/ipcores
1.5K views14:40
2020-10-16 11:46:55
Vim plugin to work easier with Verilog & SystemVerilog
https://github.com/dpretet/vim-veritoolbox
#vim #vi #verilog #SV #python
@fpgasic
1.3K views08:46
2020-10-15 21:40:22
svlint - SystemVerilog linter a tool that providing some static checks (with rule based system).
Source
Rule plugin
#HDL #checker #LINT #verilog #SV #rust
@fpgasic
1.2K views18:40
2020-10-02 19:41:07
Types and evolution of Xilinx's FPGA transceivers
#SerDes #GTP #GTX #GTH #GTY #GTZ #GTM
@fpgasic
1.5K views16:41
𝐅
